Advancements in Monolayer Transistors Using 2D Semiconducting Materials

Two-dimensional (2D) semiconducting materials have shown great potential in the development of electronic devices, such as wearables and smaller electronics. These materials offer advantages over bulkier counterparts due to their ability to retain carrier mobility even at reduced thickness. However, the use of 2D semiconductors in creating monolayer transistors, which are thinner versions of crucial electronic components, has been limited. Most monolayer transistors proposed so far have been based on a few selected materials with stable lattice structures, such as graphene, tungsten diselenide, or molybdenum disulfide (MoS2). A recent study by researchers at Hunan University, the Chinese Academy of Sciences, and Wuhan University aims to develop new monolayer transistors using alternative 2D semiconducting materials, including black phosphorus (BP) and germanium arsenide (GeAs).

Creating monolayer transistors using certain 2D materials like black phosphorus and germanium arsenide presents challenges, primarily in forming robust electrical contacts with these delicate materials. To overcome these challenges, Wangying Li, Quanyang Tao, and their team introduced a van der Waals (vdW) peeling technique that allows the fabrication of monolayer transistors with three-dimensional (3D) raised contacts. This technique involves laminating flat metals onto multilayer 2D channels and then peeling off the semiconducting layer at the top of the stack.

By employing a layer-by-layer mechanical peeling process, the researchers were able to gradually reduce the channel region of a multilayer black phosphorus transistor to a monolayer thickness without compromising its lattice structure. The technique achieves this by retaining a multilayer contact region while removing excess layers. In their study, the team utilized this peeling technique to create homo-junctions and homo-superlattices based on various 2D semiconductors, including BP, GeAs, InSe, and GaSe. The method successfully thinned down the channel part of the transistors while maintaining the necessary thickness in the contact region.

To evaluate the effectiveness of their peeling technique, Li, Tao, and their colleagues measured the electrical properties of the transistors with different channel thicknesses. They observed a significant drop in carrier mobility for black phosphorus as the body thickness was reduced, resembling the behavior of a conventional bulk semiconductor rather than a pure van der Waals semiconductor.

The recent study demonstrated the potential of the layer-by-layer peeling technique in the development of promising monolayer transistors with 3D-raised contacts using black phosphorus and germanium arsenide. This advancement could open new possibilities for creating thinner and scalable transistors utilizing unconventional 2D semiconductors that were previously considered poor performers. Furthermore, the technique could have implications for other unstable monolayer materials, including organic monolayers and perovskite monolayers, which were previously thought to be non-conductive or have poor intrinsic properties.

The emergence of 2D semiconducting materials has brought forth exciting opportunities for the development of electronic devices. While monolayer transistors using certain materials have been challenging to create, the van der Waals peeling technique has shown promise in overcoming these difficulties. By utilizing this technique, researchers have successfully fabricated monolayer transistors with 3D raised contacts using black phosphorus and germanium arsenide. This breakthrough could pave the way for the creation of thinner and scalable transistors using unconventional 2D semiconductors. With further research and development, this advancement may revolutionize the field of electronics, enabling the production of more efficient and compact devices.